The present invention relates to non-volatile memories (NVMs) and, more particularly, to techniques for handling defective non-volatile memory (NVM) segments.
FIG. 1 is a simplified block diagram of a portion of a conventional NVM system 100 configured for a 64-bit processing system (not shown)—in other words, a processing system having a data-bus width of 64 bits. The NVM system 100 comprises a main NVM sector 101, a redundant NVM sector 102, and an NVM controller 103. The NVM controller 103 controls the operations (e.g., writing, reading, erasing) for the main and redundant NVM sectors 101 and 102. The main NVM sector 101 comprises 128 64-bit memory segments 104 organized into 16 rows 105 and 8 columns 106. The redundant NVM sector 102 similarly comprises 128 64-bit memory segments 107 organized into 16 rows 108 and 8 columns 109. Each memory segment 104 in a row 105 shares common word lines (not shown) with all of the other memory segments 104 in that row 105. Similarly, each memory segment 104 in a column 106 shares common bit lines (not shown) with all of the other memory segments 104 in that column 106.
Each memory segment 104 and 107 stores one data bus width's worth of data, or 64 bits. Consequently, each row 105 and 108 stores 512 bits of data, or 64 bytes (using 8-bit bytes). Each sector 101 and 102, then, stores 1024 bytes, also called a kilobyte.
In one conventional implementation, the NVM sectors 101 and 102 are writable (in other words, programmable) and readable at the byte level, but are only erasable at the sector level. In other words, the unit for writing and reading has a size different from the size of the unit for erasing. Note that, in general, the size of the unit for writing may also be different from the size of the unit for reading. Note that a group of one or more sectors may be referred to as a block.
In one conventional implementation of the NVM system 100, if the NVM controller 103 determines that, for example, the memory segment 104(6)(2) is defective because, for example, the memory segment 104(6)(2) fails a verification operation after a write or erase operation, then the entire sector 101 is marked as a bad sector and, consequently, no longer usable. Instead, the NVM controller 103 substitutes the redundant sector 102 for the bad sector 101, where the NVM controller 103 redirects operations intended for any of the memory segments 104 within the bad sector 101 to memory segments 107 within the redundant sector 102.
In an alternative conventional implementation of the NVM system 100, if the segment 104(6)(2) is determined to be defective, then the corresponding row 105(6) is marked as a bad row, and a corresponding row 108, such as row 108(4), of the redundant NVM sector 102 is substituted for the row 105(6) containing the bad segment 104(6)(2).
In yet another alternative conventional implementation of the NVM system 100, if the segment 104(6)(2) is determined to be defective, then the corresponding column 106(2) is marked as a bad column, and a corresponding column 109, such as column 109(3), of the redundant NVM sector 102 is substituted for the column 106(2) of the bad segment 104(6)(2).
Note that the redirection may be effected by, for example, using fuse elements or muxes to redirect the word lines of a bad main row 105 or the bit lines of a bad main column 106 to the corresponding redundant row 108 or column 109. Accordingly, for example, if a redundant row 108(4) is substituted for a bad row 105(6), then read and write requests directed to, for example, the memory segment 104(6)(4) in the bad row 105(6) would be physically routed to the corresponding redundant memory segment 107(4)(4).